This patent application is related to packaging of integrated circuits and, more specifically, to multilayer integrated circuit packaging.
After the processing of a semiconductor wafer is complete, the individual integrated circuit units, or die, are separated and encased in some form of packaging so that the integrated circuit can be safely handled and mounted in an electrical system. The integrated circuit package has conducting wire leads which are connected by wires to bonding pads on the integrated circuit in the interior of the package. Connected to the outside of the package, the wire leads provide a path for communicating with the encased integrated circuit.
Among the various types of packages are multilayer packages. Such packages are useful for integrated circuits having a large number of bonding pads and therefore requiring a large of number of conducting leads. Such integrated circuits include microprocessors, gate array, and other kinds of ASICs (Application Specific Integrated Circuit), which therefore require a large number of conducting leads.
A common problem in semiconductor packaging technology is the noise generated by simultaneously switching signals, such as those on a data bus, by the adjacent leads. For example, it is common that the amount of current in a lead to rise or drop 75 milliamperes in magnitude within 1 nanosecond. With parasitic inductive coupling, particularly between power/ground leads and adjacent leads, signal switching on one lead can cause spurious voltages, i.e., noise, to be generated on the adjacent leads of the package. These spurious voltages lead to the sensing of erroneous signals on the adjacent leads.
Various solutions have long been sought to avoid these problems. Among the solutions have been the design of the integrated circuit to slow down the slew rate of the driver circuits to avoid deleterious noise from outgoing signals from the integrated circuit. However, this is not an optimal solution because the integrated circuit is slowed. Generally the faster the operation of an electrical system, the better the system.
Other solutions have included reducing the number of simultaneously switching output signals, increasing the distance between switching leads, providing more power and ground pins, adding large "deadpanning" capacitors, deskewing the switching bus and so forth.
On the other hand, the present invention solves or substantially mitigates this problem without any of these drawbacks and permits the integrated circuit in its package to operate effectively at high switching speeds.